It is important to have the ability to perform a variety of test operations on integrated circuits prior to incorporating such circuits into completed devices. On some occasions, it also is important to be able to test integrated circuits for circuit failures, open circuits, short circuits and the like, even after such integrated circuits have been interconnected with other components in an electronic device. Testing of such circuits becomes increasingly important, and increasingly difficult, as the density of the circuit components and circuitry on the wafer chip or substrate increases. It is extremely important to know in advance of the incorporation of such an integrated circuit component into a finished device that the component is capable of its anticipated operation.
On a typical integrated circuit chip, additional test circuitry must be incorporated into the chip to permit the testing function. Typically, this additional test circuitry occupies between five and fifteen percent of the total chip area; and the test circuitry can interfere with the operation of the integrated circuit device itself if a failure in the test circuitry occurs. Normally, the test circuitry is provided with power through the operating power supply for the chip itself; so that if there is a failure in the test circuitry during subsequent operation of the integrated circuit components of the system of the chip, the test circuitry failure can cause the targeted device or circuit component also to fail. Even if no failure of the test circuitry occurs, there is a constant power drain from the operating power supply by the test circuitry, since it is not isolated from the power supply. Since there is no separation of the normal power supply from the test circuitry power supply, the entire integrated circuit system is powered up during the time of the test mode, whenever the test mode is enabled. As a consequence, access and isolation of the target device for the test mode from the normal operating mode of the circuit, cannot be accomplished.
As demands made for higher fault grade silicon integrated circuits increase, the percentage of test circuitry to the function circuitry also increases. It is important that the test circuitry does not enter into the reliability consideration of the function circuitry, but this is not possible when the test structures are not dormant, that is, when the test structures are powered up by the operating power supply for the function circuitry.
Accordingly, it is desirable to provide a built-in, self-test structure for an integrated circuit wafer which provides access and isolation of the target design, and which is isolated from the host or function circuit on the wafer when it is not in use.